About Me

I am an Assistant Professor in the Computer Science Department at UCLA, where I lead the Open-Source Research in Computer Architecture and Systems (ORCAS) lab.

My research interests lie in software-hardware co-design for domain-specific accelerators, focusing on microarchitecture design, programming languages, and compiler tools to support heterogeneous computing. I am also invested in developing innovative methodologies, tooling optimizations, and infrastructures to overcome the prevalent limitations in hardware development for open-source research.

I possess a profound passion for teaching and conducting research that promotes the accessibility and democratization of scientific knowledge, contributing to several open-source projects and initiatives. The Vortex project is an initiative aimed at opening up the complete software, compiler, and hardware stacks of graphics processing units to enable detailed microarchitecture hardware research explorations in graphics, graph analytics, and machine learning.

Before joining UCLA. I was a PhD Student in the school of Computer Science at Georgia Institute of Technology under the guidance of Prof. Hyesoon Kim and Prof. Sudakar Yalamanchili.

Prior to my graduate studies, I garnered extensive industry experience working on compilers, languages, and simulation tools for graphics processors at Microsoft. I also had the privilege of interning at several prestigious research groups including Catapult Project at Microsoft Reseach, Hardware Accelerator Research Program (HARP) at Intel Labs, Storage Systems Group at IBM Alamaden Research, Future Technologies group at Oak Ridge Labs, High-Performance Computing group at Pacific Northwest Labs.

My journey has been a blend of academic rigor and industry experience, shaping my commitment to advancing technology and education.

Research Interests

Systems, compilers and hardware support for heterogeneous architectures.

Reconfigurable and hybrid architectures for high performance computing using FPGAs.

Software-hardware codesign of custom accelerators in Graph Analytics, Relational Databases and Machine Learning.

Novel architectures for low-power graphics accelerator in AR and VR domains.

High-bandwidth memory architectures and applications in high performance computing.