Publications

Skybox: Open-Source Graphic Rendering on Programmable RISC-V GPUs

Authors: Blaise Tine, Varun Saxena, Santosh Srivatsan, Joshua R. Simpson, Fadi Alzammar, Liam Paul Cooper, Sam Jijina, Swetha Rajagoplan, Tejaswini Anand Kumar, Jeff Young, Hyesoon Kim

Published in 28th Annual ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2023

Recommended citation: Blaise Tine, Varun Saxena, Santosh Srivatsan, Joshua R. Simpson, Fadi Alzammar, Liam Paul Cooper, Sam Jijina, Swetha Rajagoplan, Tejaswini Anand Kumar, Jeff Young, Hyesoon Kim. Skybox: Open-Source Graphic Rendering on Programmable RISC-V GPUs. In Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems.

Accelerating Graphic Rendering on Programmable RISC-V GPUs (POSTER)

Authors: Blaise Tine, Varun Saxena, Santosh Srivatsan, Joshua R. Simpson, Fadi Alzammar, Liam Paul Cooper, Sam Jijina, Swetha Rajagoplan, Tejaswini Anand Kumar, Jeff Young, Hyesoon Kim

Published in IEEE Hot Chips 34 Symposium (HCS), 2022

Recommended citation: Blaise Tine, Varun Saxena, Santosh Srivatsan, Joshua R. Simpson, Fadi Alzammar, Liam Paul Cooper, Sam Jijina, Swetha Rajagoplan, Tejaswini Anand Kumar, Jeff Young, Hyesoon Kim. Accelerating Graphic Rendering on Programmable RISC-V GPUs (POSTER). In Proceedings of the 2022 IEEE Hot Chips 34 Symposium (HCS)

Implementing Hardware Extensions for Multicore RISC-V GPUs

Authors: Tine Blaise, Hyesoon Kim

Published in 6th Workshop on Computer Architecture Research with RISC-V (CARRV), 2022

Recommended citation: Tine Blaise, Hyesoon Kim. Implementing Hardware Extensions for Multicore RISC-V GPUs. In Proceedings of the Workshop on Computer Architecture Research with RISC-V (CARRV 2022).

The Tip of Iceberg in Open-Source Hardware GPU

Authors: Blaise Tine, Ruobing Han and Hyesoon Kim.

Published in Workshop on Open-Source Computer Architecture Research (OSCAR), 2022

Recommended citation: Blaise Tine, Ruobing Han and Hyesoon Kim. The Tip of Iceberg in Open-Source Hardware GPU. In Proceedings of the Workshop on Open-Source Computer Architecture Research (OSCAR 2022).

Vortex: Extending the RISC-V ISA for GPGPU and 3D-Graphics

Authors: Blaise Tine, Krishna Praveen Yalamarthy, Fares Elsabbagh, Kim Hyesoon

Published in 54th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2021

Recommended citation: Blaise Tine, Krishna Praveen Yalamarthy, Fares Elsabbagh, and Kim Hyesoon, 'Vortex: Extending the RISC-V ISA for GPGPU and 3D-Graphics,' in MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO '21). Association for Computing Machinery, New York, NY, USA, 754–766. https://doi.org/10.1145/3466752.3480128

Cryptography Acceleration in a RISC-V GPGPU

Authors: Austin Adams, Pulkit Gupta, Blaise Tine, Hyesoon Kim

Published in 5th Workshop on Computer Architecture Research with RISC-V (CARRV), 2021

Recommended citation: Austin Adams, Pulkit Gupta, Blaise Tine, Hyesoon Kim. Cryptography Acceleration in a RISC-V GPGPU. In Proceedings of the Workshop on Computer Architecture Research with RISC-V (CARRV 2021).

Bringing OpenCL to Commodity RISC-V CPUs

Authors: Tine Blaise, Seyong Lee, Jeff Vetter, Hyesoon Kim

Published in 4th Workshop on Computer Architecture Research with RISC-V (CARRV), 2021

Recommended citation: Tine Blaise, Seyong Lee, Jeff Vetter, Hyesoon Kim. Bringing OpenCL to Commodity RISC-V CPUs. In Proceedings of the Workshop on Computer Architecture Research with RISC-V (CARRV 2021).

Supporting CUDA for an extended RISC-V GPU architecture

Authors: Ruobing Han, Blaise Tine, Jaewon Lee, Jaewoong Sim, Hyesoon Kim

Published in 4th Workshop on Computer Architecture Research with RISC-V (CARRV), 2021

Recommended citation: Ruobing Han, Blaise Tine, Jaewon Lee, Jaewoong Sim, Hyesoon Kim. Supporting CUDA for an extended RISC-V GPU architecture. In Proceedings of the Workshop on Computer Architecture Research with RISC-V (CARRV 2021).

An Optimizing Compiler for Just-In-Time RTL Simulation (POSTER)

Authors: Pascal Tine, Sudhakar Yalamanchili, Hyesoon Kim, Jeffrey S. Vetter

Published in International Conference on Parallel Architectures and Compilation Techniques (PACT), 2021

Recommended citation: Pascal Tine, Sudhakar Yalamanchili, Hyesoon Kim, Jeffrey S. Vetter. An Optimizing Compiler for Just-In-Time RTL Simulation (POSTER). In Proceedings of the International Conference on Parallel Architectures and Compilation Techniques

Vortex: A Reconfigurable RISC-V GPGPU Accelerator for Architecture Research (POSTER)

Authors: Fares Elsabbagh, Blaise Tine, Apurve Chawda, Will Gulian, Yaotian Feng, Priyadarshini Roshan, Ethan Lyons, Lingjun Zhu, Sung Kyu Lim, Hyesoon Kim

Published in IEEE Hot Chips 32 Symposium (HCS), 2021

Recommended citation: Fares Elsabbagh, Blaise Tine, Apurve Chawda, Will Gulian, Yaotian Feng, Priyadarshini Roshan, Ethan Lyons, Lingjun Zhu, Sung Kyu Lim, Hyesoon Kim. Vortex: A Reconfigurable RISC-V GPGPU Accelerator for Architecture Research (POSTER). In Proceedings of the 2020 IEEE Hot Chips 32 Symposium (HCS)

Cash: a single-source hardware-software codesign framework for rapid prototyping

Authors: Blaise Tine, Sudhakar Yalamanchili, Hyesoon Kim

Published in Workshop on Languages, Tools, and Techniques for Accelerator Design (LATE), 2021

Recommended citation: Blaise Tine, Sudhakar Yalamanchili, Hyesoon Kim. Cash: a single-source hardware-software codesign framework for rapid prototyping. In Proceedings of the 2021 Workshop on Languages, Tools, and Techniques for Accelerator Design

Tango: an optimizing compiler for Just-In-Time RTL simulation

Authors: Blaise-Pascal Tine, Sudhakar Yalamanchili, Hyesoon Kim

Published in 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2020

Recommended citation: Blaise Tine, Sudhakar Yalamanchili, and Hyesoon Kim, 'Tango: An Optimizing Compiler for Just-In-Time RTL Simulation,' in 2020 Design, Automation & Test in Europe Conference & Exhiition (DATE), 2020, pp. 157-162, doi: 10.23919/DATE48585.2020.9116253.

Productive Hardware Designs using Hybrid HLS-RTL Development (POSTER)

Authors: Blaise Tine, Seyong Lee, Jeffrey S. Vetter, Hyesoon Kim

Published in International Symposium on Field-Programmable Gate Arrays (FPGA), 2020

Recommended citation: Blaise Tine, Seyong Lee, Jeffrey S. Vetter, Hyesoon Kim. Productive Hardware Designs using Hybrid HLS-RTL Development (POSTER). In Proceedings of the International Symposium on Field-Programmable Gate Arrays

Pagevault: securing off-chip memory using page-based authentication

Authors: Blaise-Pascal Tine, Sudhakar Yalamanchili

Published in Proceedings of the International Symposium on Memory Systems (MEMSYS), 2017

Recommended citation: Blaise-Pascal Tine and Sudhakar Yalamanchili. 2017. Pagevault: securing off-chip memory using page-based authentication. In Proceedings of the International Symposium on Memory Systems (MEMSYS '17). Association for Computing Machinery, New York, NY, USA, 293–304. https://doi.org/10.1145/3132402.3132439

Patents

Rasterization of compute shaders

A Glaister, BP Tine, D Sessions, M Lyapunov, Y Dotsenko

US Patent 9,529,575

Vectorization of shaders

A Glaister, BP Tine, B Pelton, D Sessions, M Lyapunov, Y Dotsenko

US Patent 8,806,458 11 2014

Scalar optimizations for shaders

A Glaister, BP Tine, D Sessions, M Lyapunov, Y Dotsenko

US Patent 9,430,199

Lookup tables for text rendering

BPF Tine, CN Raubacher, AJR Hodsdon, MM Cohen

US Patent 9,129,441