A Scalable Multicore RISC-V GPGPU Accelerator for High-End FPGAs (POSTER)

Published in 58th Design Automation Conference (DAC), Designer Track, 2021

Recommended citation: Blaise Tine, Fares Elsabbagh, Seyong Lee, Jeffrey S. Vetter, Sung Kyu Lim, Hyesoon Kim. A Scalable Multicore RISC-V GPGPU Accelerator for High-End FPGAs (POSTER). 58th Design Automation Conference (DAC), Designer Track, 2021.